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Erised – SUSTech Department of Electronic and Electrical Engineering Joint Laboratory Inaugurated

Erised – SUSTech Department of Electronic and Electrical Engineering Joint Laboratory Inaugurated

(Summary description)On the morning of June 24, 2026, Erised (Shenzhen) Co., Ltd. and the Department of Electronic and Electrical Engineering at Southern University of Science and Technology (SUSTech) jointly inaugurated the “SUSTech Department of Electronic and Electrical Engineering – Erised Joint Laboratory” in Conference Room 812 of the College of Engineering.  Attending the ceremony were Erised’s Chairman Chen Tingyang, General Manager of the Display Driver Business Group Xie Yuxuan, and other core members of the company. From SUSTech, Professor Chen Mingwei, Dean of the College of Engineering, Associate Professors Jiang Junmin and Hua Mengyuan, Research Assistant Professor Hu Chen from the Department of Electronic and Electrical Engineering, as well as Associate Professor Gao Yuan from the School of Microelectronics, along with faculty and student representatives, gathered to witness this important moment.   At the start of the unveiling ceremony, Professor Chen Mingwei, Dean of SUSTech’s College of Engineering, delivered the first address and extended a warm welcome to Chairman Chen Tingyang and his delegation. He noted that the College of Engineering has developed rapidly in the field of information semiconductors, thanks to university industry collaboration and support from the Shenzhen municipal government. In recent years, the College has performed exceptionally well in research funding, with nearly one third of its annual research budget coming from the semiconductor and information industries. He emphasized that the semiconductor industry is currently experiencing an AI driven super cycle expansion, with an upward trend spanning the entire industrial chain—from chips, memory, and optoelectronics to AI automation. This technological boom provides a strategic window for enterprise university cooperation. The College will support the joint laboratory in terms of policy and value creation, and hopes that both sides will build a mutually beneficial mechanism for integrating production, education, research, and application. Through collaborative research, they aim to solve key technological issues in emerging industries, actively encourage students to undertake internships and practical training in the company, and cultivate students’ practical innovation capabilities through teaching cooperation. [Speech by Dean Chen Mingwei] Chairman Chen Tingyang shared Erised’s growth journey in his speech. Over the past seven years, Erised has been deeply engaged in the chip sector, focusing on R&D in display drivers, power management, and optical interconnect ICs. The company’s core R&D team comes from leading semiconductor companies in the industry, possessing solid know how in industrialization. He remarked that China’s semiconductor industry stands at a critical turning point from technology introduction to independent innovation, and that the deep coupling of industrial upgrade demands with university research strengths will be a key path to breaking through core technology bottlenecks. Erised has long valued university industry partnerships, and the company is full of anticipation for this collaboration with SUSTech. In the future, the joint laboratory will serve as an important vehicle to fully integrate the company’s industrial platform with the university’s research resources, deeply connecting the entire chain of production, education, research, and application, so that both parties can complement each other’s strengths and achieve mutual progress. [Speech by Chairman Chen Tingyang] Mr. Xie Yuxuan, General Manager of the Display Driver Business Group, gave a comprehensive presentation on Erised’s overall development strategy and core product lines to the university leaders, faculty, and students. He explained that the company currently focuses on two major chip tracks: display drivers and power management. In the display driver field, Erised has completed the full deployment of a domestic product line, which constitutes its differentiated core competitiveness. Its panel partners include industry leaders such as BOE and Truly, and its end products supply well known domestic and international brands including TCL and Amazon. The power management business has also undergone a strategic upgrade, combining sustained independent R&D with expanded industrial investment, and collaborating with multiple partners to jointly develop power ICs for small electric devices. He expressed the hope that, through the newly established joint laboratory, the company can engage in deeper, more targeted collaborative research with the SUSTech team。 [Speech by General Manager Xie Yuxuan] Subsequently, Chairman Chen Tingyang and Dean Chen Mingwei jointly unveiled the plaque for the joint laboratory. [Unveiling ceremony]  Following the unveiling, Associate Professor Jiang Junmin from SUSTech’s Department of Electronic and Electrical Engineering, who serves as the Director of the joint laboratory, presented the 2026 2027 construc

Erised – SUSTech Department of Electronic and Electrical Engineering Joint Laboratory Inaugurated

(Summary description)On the morning of June 24, 2026, Erised (Shenzhen) Co., Ltd. and the Department of Electronic and Electrical Engineering at Southern University of Science and Technology (SUSTech) jointly inaugurated the “SUSTech Department of Electronic and Electrical Engineering – Erised Joint Laboratory” in Conference Room 812 of the College of Engineering.



 Attending the ceremony were Erised’s Chairman Chen Tingyang, General Manager of the Display Driver Business Group Xie Yuxuan, and other core members of the company. From SUSTech, Professor Chen Mingwei, Dean of the College of Engineering, Associate Professors Jiang Junmin and Hua Mengyuan, Research Assistant Professor Hu Chen from the Department of Electronic and Electrical Engineering, as well as Associate Professor Gao Yuan from the School of Microelectronics, along with faculty and student representatives, gathered to witness this important moment.



  At the start of the unveiling ceremony, Professor Chen Mingwei, Dean of SUSTech’s College of Engineering, delivered the first address and extended a warm welcome to Chairman Chen Tingyang and his delegation. He noted that the College of Engineering has developed rapidly in the field of information semiconductors, thanks to university industry collaboration and support from the Shenzhen municipal government. In recent years, the College has performed exceptionally well in research funding, with nearly one third of its annual research budget coming from the semiconductor and information industries. He emphasized that the semiconductor industry is currently experiencing an AI driven super cycle expansion, with an upward trend spanning the entire industrial chain—from chips, memory, and optoelectronics to AI automation. This technological boom provides a strategic window for enterprise university cooperation. The College will support the joint laboratory in terms of policy and value creation, and hopes that both sides will build a mutually beneficial mechanism for integrating production, education, research, and application. Through collaborative research, they aim to solve key technological issues in emerging industries, actively encourage students to undertake internships and practical training in the company, and cultivate students’ practical innovation capabilities through teaching cooperation.

[Speech by Dean Chen Mingwei]

Chairman Chen Tingyang shared Erised’s growth journey in his speech. Over the past seven years, Erised has been deeply engaged in the chip sector, focusing on R&D in display drivers, power management, and optical interconnect ICs. The company’s core R&D team comes from leading semiconductor companies in the industry, possessing solid know how in industrialization. He remarked that China’s semiconductor industry stands at a critical turning point from technology introduction to independent innovation, and that the deep coupling of industrial upgrade demands with university research strengths will be a key path to breaking through core technology bottlenecks. Erised has long valued university industry partnerships, and the company is full of anticipation for this collaboration with SUSTech. In the future, the joint laboratory will serve as an important vehicle to fully integrate the company’s industrial platform with the university’s research resources, deeply connecting the entire chain of production, education, research, and application, so that both parties can complement each other’s strengths and achieve mutual progress.



[Speech by Chairman Chen Tingyang]

Mr. Xie Yuxuan, General Manager of the Display Driver Business Group, gave a comprehensive presentation on Erised’s overall development strategy and core product lines to the university leaders, faculty, and students. He explained that the company currently focuses on two major chip tracks: display drivers and power management. In the display driver field, Erised has completed the full deployment of a domestic product line, which constitutes its differentiated core competitiveness. Its panel partners include industry leaders such as BOE and Truly, and its end products supply well known domestic and international brands including TCL and Amazon. The power management business has also undergone a strategic upgrade, combining sustained independent R&D with expanded industrial investment, and collaborating with multiple partners to jointly develop power ICs for small electric devices. He expressed the hope that, through the newly established joint laboratory, the company can engage in deeper, more targeted collaborative research with the SUSTech team。



[Speech by General Manager Xie Yuxuan]

Subsequently, Chairman Chen Tingyang and Dean Chen Mingwei jointly unveiled the plaque for the joint laboratory.



[Unveiling ceremony]

 Following the unveiling, Associate Professor Jiang Junmin from SUSTech’s Department of Electronic and Electrical Engineering, who serves as the Director of the joint laboratory, presented the 2026 2027 construc

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  • Time of issue:2026-06-29 14:21
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On the morning of June 24, 2026, Erised (Shenzhen) Co., Ltd. and the Department of Electronic and Electrical Engineering at Southern University of Science and Technology (SUSTech) jointly inaugurated the “SUSTech Department of Electronic and Electrical Engineering – Erised Joint Laboratory” in Conference Room 812 of the College of Engineering.

 Attending the ceremony were Erised’s Chairman Chen Tingyang, General Manager of the Display Driver Business Group Xie Yuxuan, and other core members of the company. From SUSTech, Professor Chen Mingwei, Dean of the College of Engineering, Associate Professors Jiang Junmin and Hua Mengyuan, Research Assistant Professor Hu Chen from the Department of Electronic and Electrical Engineering, as well as Associate Professor Gao Yuan from the School of Microelectronics, along with faculty and student representatives, gathered to witness this important moment.

 At the start of the unveiling ceremony, Professor Chen Mingwei, Dean of SUSTech’s College of Engineering, delivered the first address and extended a warm welcome to Chairman Chen Tingyang and his delegation. He noted that the College of Engineering has developed rapidly in the field of information semiconductors, thanks to university industry collaboration and support from the Shenzhen municipal government. In recent years, the College has performed exceptionally well in research funding, with nearly one third of its annual research budget coming from the semiconductor and information industries. He emphasized that the semiconductor industry is currently experiencing an AI driven super cycle expansion, with an upward trend spanning the entire industrial chain—from chips, memory, and optoelectronics to AI automation. This technological boom provides a strategic window for enterprise university cooperation. The College will support the joint laboratory in terms of policy and value creation, and hopes that both sides will build a mutually beneficial mechanism for integrating production, education, research, and application. Through collaborative research, they aim to solve key technological issues in emerging industries, actively encourage students to undertake internships and practical training in the company, and cultivate students’ practical innovation capabilities through teaching cooperation.

[Speech by Dean Chen Mingwei]

Chairman Chen Tingyang shared Erised’s growth journey in his speech. Over the past seven years, Erised has been deeply engaged in the chip sector, focusing on R&D in display drivers, power management, and optical interconnect ICs. The company’s core R&D team comes from leading semiconductor companies in the industry, possessing solid know how in industrialization. He remarked that China’s semiconductor industry stands at a critical turning point from technology introduction to independent innovation, and that the deep coupling of industrial upgrade demands with university research strengths will be a key path to breaking through core technology bottlenecks. Erised has long valued university industry partnerships, and the company is full of anticipation for this collaboration with SUSTech. In the future, the joint laboratory will serve as an important vehicle to fully integrate the company’s industrial platform with the university’s research resources, deeply connecting the entire chain of production, education, research, and application, so that both parties can complement each other’s strengths and achieve mutual progress.

[Speech by Chairman Chen Tingyang]

Mr. Xie Yuxuan, General Manager of the Display Driver Business Group, gave a comprehensive presentation on Erised’s overall development strategy and core product lines to the university leaders, faculty, and students. He explained that the company currently focuses on two major chip tracks: display drivers and power management. In the display driver field, Erised has completed the full deployment of a domestic product line, which constitutes its differentiated core competitiveness. Its panel partners include industry leaders such as BOE and Truly, and its end products supply well known domestic and international brands including TCL and Amazon. The power management business has also undergone a strategic upgrade, combining sustained independent R&D with expanded industrial investment, and collaborating with multiple partners to jointly develop power ICs for small electric devices. He expressed the hope that, through the newly established joint laboratory, the company can engage in deeper, more targeted collaborative research with the SUSTech team。

[Speech by General Manager Xie Yuxuan]

Subsequently, Chairman Chen Tingyang and Dean Chen Mingwei jointly unveiled the plaque for the joint laboratory.

[Unveiling ceremony]

Following the unveiling, Associate Professor Jiang Junmin from SUSTech’s Department of Electronic and Electrical Engineering, who serves as the Director of the joint laboratory, presented the 2026 2027 construction plan. Director Jiang provided a detailed overview of the laboratory’s profile, the team’s research foundation and highlights, team members, research expectations, and schedule. He also shared successful experiences in industry university collaborative talent cultivation, stressing that personnel training is as important as technological R&D. A previously established joint training base has already produced eight graduate students, some of whom have joined prestigious organisations such as China Aerospace, demonstrating high training quality. He hopes that the joint laboratory will also actively pursue further cooperation in university industry joint education.

[Report by Director Jiang Junmin]

After the meeting, Chairman Chen Tingyang and his delegation, accompanied by Director Jiang Junmin and Professor Hu Chen, visited the joint laboratory on site.

The establishment of the “SUSTech Department of Electronic and Electrical Engineering – Erised Joint Laboratory” marks the beginning of extensive collaboration between the two parties in talent cultivation, teaching, and research in the field of power chip design. In the future, both sides will take this opportunity to build a long term industry university research collaborative mechanism. Leveraging Erised’s mature industrialization platform and chip mass production capabilities, combined with the strong research strength of SUSTech’s Department of Electronic and Electrical Engineering, they will fully exploit the complementary advantages of university and enterprise resources. The joint laboratory will be developed into a high level innovation hub that integrates cutting edge research, industrial core technology development, integrated circuit talent co education, technology demonstration, and commercialisation of research outcomes. Together, they aim to explore new models of university industry cooperation and set a new benchmark for the integration of education and industry.

[Group photo of attending experts and students]

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From Electricity to Light, We Redefine "Driving" News 丨 2026-08-12
Six months ago, when CPO was still on the eve of mass production at scale, we did one thing: we announced our full scale entry into CPO. Half a year later, NVIDIA's Spectrum X CPO switches have started shipping to partners, and Broadcom's 51.2T Bailly CPO switches are maintaining small volume production. CPO has officially moved from proof of concept into the commercial mass production phase. Looking back, that decision was not impulsive. It was not only a strategic choice to align with the generational shift in AI computing infrastructure, but also a critical leap that transforms our deep expertise in display drivers and power management into a core competitive edge in next generation optoelectronic integration. As a company that started with display drivers and power management, our move into CPO is by no means blind diversification; it is grounded in the commonality of underlying technologies: Core Positioning in Power Management: CPO modules integrate optical engines and switching chips with high density, imposing extreme demands on local power supply stability, transient response, and energy efficiency. Our deep accumulation in power management ICs (PMICs) is now being transformed into high density power modules and laser driver chips (LDDs) for CPO optical engines, delivering customized, high precision, low noise power solutions. Synergy of Precision Driving: Our accumulated expertise in precision signal control and packaging processes from display drivers aligns exceptionally well with the precision driving requirements for lasers and modulators in CPO optical engines. This capability is now extending to critical components on the receiving end, such as trans impedance amplifiers (TIAs) and optical modulator driver chips, covering the entire optical signal transmission and reception chain. Embracing Next Generation Technology Evolution: In addition to the mainstream silicon photonics route, we are also actively evaluating emerging technology paths such as Micro LED optical communication. These new technologies pose entirely fresh demands on driving and power, which are precisely the ideal battleground for us to leverage our dual genetic strengths in display drivers and power management. The year 2026 marks the first year of CPO mass production and also our starting year on the optoelectronic integration track. Leveraging our core technological accumulations in Micro LED device driving, optoelectronic calibration, and mass transfer defect compensation, we are extending our dual genetic advantages in display drivers and power management into the field of Micro LED high speed optical interconnects for AI data centers. To date, the company has accumulated over 70 patents, shipped more than 200 million chips in total, and served over 100 clients worldwide. Behind these numbers lies our complete capability loop from R&D to mass production, from validation to delivery, in display drivers and power management. It is precisely this capability that emboldened us to make the strategic decision to fully enter CPO when it was still on the eve of large scale mass production. Looking ahead, we will continue to uphold our core principle of "verifiable, mass producible, and deliverable," striving for excellence in our foundational businesses of power and driving. We will keep increasing R&D investment, collaborate with upstream and downstream partners across the industrial chain, and jointly build a prosperous and healthy semiconductor ecosystem, contributing unique value to the CPO ecosystem. From screens to optical engines, from Micro LED to CPO—we are already on board the vast ocean of optoelectronic integration.   Media Contact: Tel: 0755-26671807 Sales Email: sales@erised-semi.com Website: www.erised-semi.com    

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